Invention Grant
- Patent Title: Selectively deposited spacer film for metal gate sidewall protection
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Application No.: US15651717Application Date: 2017-07-17
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Publication No.: US09865709B2Publication Date: 2018-01-09
- Inventor: Tsai-Jung Ho , Pei-Ren Jeng
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L21/3065 ; H01L21/768 ; H01L21/283

Abstract:
A method of fabricating a fin field-effect transistor (FinFET) device is provided. The method includes forming a carbon-based layer on a plurality of gate structures formed on a semiconductor substrate. Each gate structure overlies at least one fin formed on the semiconductor substrate. The carbon-based layer covers sidewalls of the gate structures. A metal silicide layer overlies the carbon-based layer. The metal silicide layer and carbon-based layer are removed, and a metal layer is formed between adjacent gate structures.
Public/Granted literature
- US20170317192A1 SELECTIVELY DEPOSITED SPACER FILM FOR METAL GATE SIDEWALL PROTECTION Public/Granted day:2017-11-02
Information query
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