Invention Grant
- Patent Title: Semiconductor device
-
Application No.: US14516806Application Date: 2014-10-17
-
Publication No.: US09881868B2Publication Date: 2018-01-30
- Inventor: Shigeo Tokumitsu , Takahiro Mori , Tetsuya Nitta
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Koutou-ku, Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Koutou-ku, Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2013-225212 20131030
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L49/02 ; H01L27/08 ; H01L23/532

Abstract:
A plurality of first wiring layers are arranged on a main surface of a substrate, a first insulating film is arranged on upper faces of the plurality of first wiring layers, a second insulating film is arranged on an upper face of the first insulating film, and a plurality of second wiring layers are arranged on the second insulating film. A metal resistive element layer is arranged just below at least one second wiring layer among the plurality of second wiring layers. A plurality of conductive layers extend from the plurality of second wiring layers respectively to the metal resistive element layer in a Z direction perpendicular to the main surface. The metal resistive element layer includes a metal wiring layer. At least one part of a side face of at least one conductive layer among the plurality of conductive layers is connected to the metal wiring layer.
Public/Granted literature
- US09786594B2 Semiconductor device Public/Granted day:2017-10-10
Information query
IPC分类: