Invention Grant
- Patent Title: Metal routing architecture for integrated circuits
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Application No.: US14954116Application Date: 2015-11-30
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Publication No.: US09881885B2Publication Date: 2018-01-30
- Inventor: Chen-Cheng Kuo , Chita Chuang , Chih-Hua Chen , Chen-Shien Chen , Yao-Chun Chuang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L23/528

Abstract:
A device includes a substrate, a metal pad over the substrate, and a metal trace electrically disconnected from the metal pad. The metal pad and the metal trace are level with each other. A passivation layer includes a portion overlapping an edge portion of the metal pad. A metal pillar is overlying the metal pad, and is electrically connected to the metal pad. The metal trace has a portion overlapped by the metal pillar.
Public/Granted literature
- US20160079192A1 Metal Routing Architecture for Integrated Circuits Public/Granted day:2016-03-17
Information query
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