Invention Grant
- Patent Title: Memory device
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Application No.: US15249837Application Date: 2016-08-29
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Publication No.: US09882122B2Publication Date: 2018-01-30
- Inventor: Daisuke Saida , Naoharu Shimomura
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2014-058366 20140320
- Main IPC: G11C11/00
- IPC: G11C11/00 ; H01L43/08 ; G11C11/16

Abstract:
According to one embodiment, a memory device includes a stacked structure and a controller. The stacked structure includes a first magnetic layer, a second magnetic layer stacked with the first magnetic layer, and a first nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. The second magnetic layer includes a first portion and a second portion stacked with the first portion. A magnetic resonance frequency of the first portion is different from a magnetic resonance frequency of the second portion. The controller is electrically connected to the stacked structure and causes a pulse current to flow in the stacked body in a first period. A length of the first period is not less than 0.9 times and not more than 1.1 times the absolute value of an odd number times of the reciprocal of a magnetic resonance frequency of the second magnetic layer.
Public/Granted literature
- US20160365508A1 MEMORY DEVICE Public/Granted day:2016-12-15
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