Invention Grant
- Patent Title: Modeling TSV interposer considering depletion capacitance and substrate effects
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Application No.: US14816268Application Date: 2015-08-03
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Publication No.: US09886542B2Publication Date: 2018-02-06
- Inventor: Ki Jin Han , Madhavan Swaminathan
- Applicant: Ki Jin Han , Madhavan Swaminathan
- Applicant Address: US GA Savannah
- Assignee: E-System Design, Inc.
- Current Assignee: E-System Design, Inc.
- Current Assignee Address: US GA Savannah
- Agency: Bockhop Intellectual Property Law, LLC
- Agent Bryan W. Bockhop
- Main IPC: G06F17/00
- IPC: G06F17/00 ; G06F17/50

Abstract:
In a method for modeling electromagnetic effects in a planar circuit that employs a plurality of through-silicon vias in a domain, a region around each through-silicon via is described in terms of a cylindrical accumulation mode basis function. The cylindrical accumulation mode basis function is incorporated into an equivalent circuit that describes selected electrical characteristics of each through-silicon via. A plurality of localized intervals around each through-silicon via is selected. A multilayer Green's function is approximated for IMNzz′ (wherein M and N identify selected layers and wherein zz′ designates layer boundaries in a layer through which the through-silicon via passes) in each localized interval without approximating the Green's function over the entire domain. Coefficients IMNzz′ are approximated over a predetermined range of frequencies (ω). Admittance parameters based on of IMNzz′ are calculated over a frequency sweep.
Public/Granted literature
- US20160034633A1 Modeling TSV Interposer Considering Depletion Capacitance and Substrate Effects Public/Granted day:2016-02-04
Information query