Invention Grant
- Patent Title: Ordering mechanism for offload graphics scheduling
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Application No.: US14582972Application Date: 2014-12-24
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Publication No.: US09886934B2Publication Date: 2018-02-06
- Inventor: Bryan R. White , Balaji Vembu , Murali Ramadoss , Altug Koker , Aditya Navale
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schiff Hardin LLP
- Main IPC: G09G5/18
- IPC: G09G5/18 ; G06T1/20 ; G09G5/02 ; G09G5/14 ; G09G5/36
Abstract:
Described herein are technologies related to a ensuring that graphics commands and graphics context are offloading and scheduled for consumption as the commands and graphics context are sent from coherent to non-coherent memory/fabric in a “processor to processor” handoff or transaction.
Public/Granted literature
- US20160189681A1 Ordering Mechanism for Offload Graphics Scheduling Public/Granted day:2016-06-30
Information query
