Invention Grant
- Patent Title: Write voltage generation circuit and memory apparatus
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Application No.: US15142988Application Date: 2016-04-29
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Publication No.: US09887012B2Publication Date: 2018-02-06
- Inventor: Akira Akahori , Katsuaki Matsui
- Applicant: LAPIS Semiconductor Co., Ltd.
- Applicant Address: JP Yokohama
- Assignee: LAPIS SEMICONDUCTOR CO., LTD.
- Current Assignee: LAPIS SEMICONDUCTOR CO., LTD.
- Current Assignee Address: JP Yokohama
- Agency: Rabin & Berdo, P.C.
- Priority: JP2015-094334 20150501
- Main IPC: G11C5/14
- IPC: G11C5/14 ; G11C17/12 ; G11C17/18

Abstract:
A write voltage generation circuit includes: a power supply terminal that receives an external power supply voltage; a boosting circuit that boosts the external power supply voltage to generate a boosted voltage; and a selector that selects either one of the external power supply voltage and the boosted voltage, and outputs the selected voltage as the write voltage. The selector selects the external power supply voltage as the write voltage in a first part of a write period for writing data to a memory cell, and selects the boosted voltage as the write voltage in a latter part of the write period.
Public/Granted literature
- US20160322086A1 WRITE VOLTAGE GENERATION CIRCUIT AND MEMORY APPARATUS Public/Granted day:2016-11-03
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