Invention Grant
- Patent Title: Manufacturing method of semiconductor device
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Application No.: US14983143Application Date: 2015-12-29
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Publication No.: US09887105B2Publication Date: 2018-02-06
- Inventor: Haruhiko Harada
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2015-009253 20150121
- Main IPC: H01L21/56
- IPC: H01L21/56 ; B29C45/14 ; B29C45/40 ; B29C45/02 ; H01L23/29 ; H01L23/31 ; H01L23/00 ; B29K105/00

Abstract:
An object of the present invention is to improve the reliability and productivity of a semiconductor device by suppressing generation of a resin burr in a molding process. In a mold die, a tip-end surface of each push-up pin provided on the rear surface side of a lower die cavity block and a part of the rear surface of the lower die cavity block with which the tip-end surface of each push-up pin is contacted are inclined in such a manner that a distance to a top surface of the lower die cavity block becomes longer towards the pot side where mold resin is supplied. Accordingly, when the lower die cavity block is returned to the initial position, the lower die cavity block is lifted while being slightly moved towards the pot block side. Thus, no gap is formed between a side surface of the pot block and a side surface of the lower die cavity block.
Public/Granted literature
- US20160211152A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2016-07-21
Information query
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