Invention Grant
- Patent Title: Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same
-
Application No.: US13651045Application Date: 2012-10-12
-
Publication No.: US09887155B2Publication Date: 2018-02-06
- Inventor: Ping-Yin Liu , Kai-Wen Cheng , Xin-Hua Huang , Lan-Lin Chao , Chia-Shiung Tsai , Xiaomeng Chen
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/30
- IPC: H01L21/30 ; H01L23/522 ; H01L21/768

Abstract:
A semiconductor device including a conductive element and an interface surface fabricated atop the conductive element, and a method for fabricating such a device are described. An exemplary device includes a substrate having a conductive element and a metal layer fabricated atop the conductive element. An oxide layer is fabricated atop the metal layer, thus forming an interface surface. During polishing (e.g., planarization), in which an upper portion of the interface surface is removed, the presence of the interface surface greatly reduces the loading on the conductive element. A second substrate fabricated using the same process may be stacked atop the first substrate and bonded using a hybrid bonding process.
Public/Granted literature
- US20140091438A1 MULTIPLE METAL LAYER SEMICONDUCTOR DEVICE AND LOW TEMPERATURE STACKING METHOD OF FABRICATING THE SAME Public/Granted day:2014-04-03
Information query
IPC分类: