- Patent Title: Heterogeneous sampling delay line-based time to digital converter
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Application No.: US15520906Application Date: 2015-08-26
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Publication No.: US09891594B2Publication Date: 2018-02-13
- Inventor: Jae Sung Lee , Jun Yeon Won
- Applicant: Seoul National University R&DB Foundation
- Applicant Address: KR Seoul
- Assignee: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
- Current Assignee: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
- Current Assignee Address: KR Seoul
- Agency: Lex IP Meister, PLLC
- Priority: KR10-2014-0154763 20141107
- International Application: PCT/KR2015/008912 WO 20150826
- International Announcement: WO2016/072600 WO 20160512
- Main IPC: G04F10/00
- IPC: G04F10/00 ; H03K5/14 ; H03K5/00 ; H03L7/06

Abstract:
A delay line-based time to digital converter includes: a coarse counter for counting a pulse of a timing clock and measuring a time when an edge of an input signal is detected; a fine time interpolator including a plurality of first delay elements and a plurality of second delay elements, a delay line with the input signal as an input, and a flip-flop unit with outputs of the first delay element or outputs of the second delay elements as inputs and the timing clock as an operation frequency; and a timestamp generator for receiving a digital value on a time measured by the coarse counter and the fine time interpolator, and generating a timestamp on the input signal by using the received digital value.
Public/Granted literature
- US20180017944A1 HETEROGENEOUS SAMPLING DELAY LINE-BASED TIME TO DIGITAL CONVERTER Public/Granted day:2018-01-18
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