Invention Grant
- Patent Title: Split-path heuristic for performing a fused FMA operation
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Application No.: US14749050Application Date: 2015-06-24
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Publication No.: US09891886B2Publication Date: 2018-02-13
- Inventor: Thomas Elmer
- Applicant: VIA ALLIANCE SEMICONDUCTOR CO, LTD.
- Applicant Address: CN Shanghai
- Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD
- Current Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD
- Current Assignee Address: CN Shanghai
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: G06F7/483
- IPC: G06F7/483 ; G06F7/544 ; G06F7/487 ; G06F7/485 ; G06F7/499 ; G06F9/30 ; G06F9/38 ; G06F17/16

Abstract:
A microprocessor performs a fused multiply-accumulate operation of a form ±A*B±C. An evaluation is made to detect whether values of A, B, and/or C meet a sufficient condition for performing a joint accumulation of C with partial products of A and B. If so, a joint accumulation of C is done with partial products of A and B and result of the joint accumulation is rounded. If not, then a primary accumulation is done of the partial products of A and B. This generates an unrounded non-redundant result of the primary accumulation. The unrounded result is then truncated to generate an unrounded non-redundant intermediate result vector that excludes one or more least significant bits of the unrounded non-redundant result. A secondary accumulation is then performed, adding or subtracting C to the unrounded non-redundant intermediate result vector. Finally, the result of the secondary accumulation is rounded.
Public/Granted literature
- US20160004507A1 SPLIT-PATH HEURISTIC FOR PERFORMING A FUSED FMA OPERATION Public/Granted day:2016-01-07
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