Invention Grant
- Patent Title: Information processing apparatus and switch failure detection method
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Application No.: US14577505Application Date: 2014-12-19
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Publication No.: US09891981B2Publication Date: 2018-02-13
- Inventor: Takatsugu Ono , Mitsuru Sato , Susumu Saga
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/07 ; G06F11/16 ; G06F11/20

Abstract:
An information processing apparatus includes a storage device, an arithmetic processing unit, a first converting device, and a second converting device. The storage device outputs data in accordance with a memory access request. The arithmetic processing unit performs an arithmetic operation on the data. The first converting device converts a memory access request issued by the arithmetic processing unit to a memory access signal and sends to the storage device. The second converting device converts a memory access request issued by the arithmetic processing unit to a memory access signal, acquires the memory access signal sent by the first converting device, and compares the content of a memory access performed by using the converted memory access signal with the content of a memory access performed by using the acquired memory access signal, and determines whether the first converting device has failed.
Public/Granted literature
- US20150106658A1 INFORMATION PROCESSING APPARATUS AND FAILURE DETECTION METHOD OF INFORMATION PROCESSING APPARATUS Public/Granted day:2015-04-16
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