Invention Grant
- Patent Title: Chip mounting structure
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Application No.: US15255588Application Date: 2016-09-02
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Publication No.: US09893031B2Publication Date: 2018-02-13
- Inventor: Akihiro Horibe , Keiji Matsumoto , Keishi Okamoto , Kazushige Toriyama
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Fleit Gibbons Gutman Bongini Bianco PL
- Agent Jon A. Gibbons
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/00 ; H05K7/00 ; H01L23/00 ; H01L23/34 ; H01L23/522 ; H01L21/768 ; H01L25/065 ; H01L25/00 ; H01L23/498 ; H01L21/48 ; B23K3/06 ; H01L23/488

Abstract:
Highly reliable chip mounting is accomplished by using a substrate having such a shape that a stress exerted on a flip-chip-connected chip can be reduced, so that the stress exerted on the chip is reduced and separation of an interlayer insulating layer having a low dielectric constant (low-k) is minimized. Specifically, in a chip mounting structure, a chip including an interlayer insulating layer having a low dielectric constant (low-k) is flip-chip connected to a substrate via bumps is shown. In the chip mounting structure, the substrate has such a shape that a mechanical stress exerted on the interlayer insulating layer at corner portions of the chip due to a thermal stress is reduced, the thermal stress occurring due to a difference in coefficient of thermal expansion between the chip and the substrate.
Public/Granted literature
- US20170005053A1 CHIP MOUNTING STRUCTURE Public/Granted day:2017-01-05
Information query
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