Invention Grant
- Patent Title: Method for manufacturing a semiconductor device
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Application No.: US15623076Application Date: 2017-06-14
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Publication No.: US09893068B2Publication Date: 2018-02-13
- Inventor: Hiroyuki Hoshizaki
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2014-091299 20140425
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L49/02

Abstract:
To effectively prevent short circuit between capacitors adjacent to each other. A semiconductor device has a substrate, an interlayer insulating film, a plurality of capacitors, and an isolation insulating film. The interlayer insulating film is located over the substrate. The capacitors are located in a plurality of recesses, respectively. The recesses each have an opening in the surface of the interlayer insulating film. The isolation insulating film lies in the interlayer insulating film. The isolation insulating films are located between recesses adjacent to each other in plan view. Further, the isolation insulating film is made of a material different from that of the interlayer insulating film.
Public/Granted literature
- US20170287916A1 SEMICONDUCTOR DEVICE Public/Granted day:2017-10-05
Information query
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