Invention Grant
- Patent Title: Three-dimensional laminated wiring substrate
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Application No.: US14472976Application Date: 2014-08-29
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Publication No.: US09894758B2Publication Date: 2018-02-13
- Inventor: Takeshi Kimura
- Applicant: Tyco Electronics Japan G.K.
- Applicant Address: JP Kanagawa-ken
- Assignee: Tyco Electronics Japan G.K.
- Current Assignee: Tyco Electronics Japan G.K.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Barley Snyder
- Priority: JP2012-049413 20120306
- Main IPC: H01G4/30
- IPC: H01G4/30 ; H05K7/10 ; H05K7/12 ; H05K1/09 ; H05K1/02 ; H05K3/46 ; H01G4/005 ; H05K1/16 ; H05K3/00

Abstract:
A three-dimensional laminated wiring substrate is provided and includes a plurality of wiring substrates disposed on top of each other. Each of the plurality of wiring substrates includes an insulating film and a conductor pattern. The insulating film is disposed along a surface to provide a three-dimensional surface. The conductor pattern is disposed on and extending along the three-dimensional surface.
Public/Granted literature
- US20140368969A1 Three-Dimensional Laminated Wiring Substrate Public/Granted day:2014-12-18
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