Integrated circuit for estimating power of at least one node using temperature and a system including the same
Abstract:
A power estimation circuit including: a power estimation manager circuit configured to receive power data and temperature data; and a storage circuit that includes a first region storing resistive-capacitive (RC) thermal modeling data, a second region storing the power data and a third region storing the temperature data, wherein the power estimation manager circuit is configured to estimate power consumption of a first node at a second time point, which occurs after a first time point, using the RC thermal modeling data, the power data and the temperature data.
Information query
Patent Agency Ranking
0/0