Invention Grant
- Patent Title: Multi master arbitration scheme in a system on chip
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Application No.: US14306970Application Date: 2014-06-17
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Publication No.: US09910803B2Publication Date: 2018-03-06
- Inventor: Saya Goud Langadi
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Charles A. Brill; Frank D. Cimino
- Main IPC: G06F13/12
- IPC: G06F13/12 ; G06F13/37 ; G06F13/16

Abstract:
A multi master system on chip (SoC) includes a plurality of masters comprising a first master and a second master, each configured to generate a request. A next state generator in the multi master SoC is configured to generate a next state of a round robin pointer in response to the request and a current state of the round robin pointer. The round robin pointer is configured to generate an enable signal to enable a priority encoder for the first master in response to the current state of the round robin pointer. Further, the next state of the round robin pointer is generated such that a priority is maintained for the first master until there is a request from the second master.
Public/Granted literature
- US20140372648A1 MULTI MASTER ARBITRATION SCHEME IN A SYSTEM ON CHIP Public/Granted day:2014-12-18
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