Latch based parallel-to-serial readout circuitry and image sensor utilizing the circuitry
Abstract:
A latch-based parallel to serial readout circuitry includes latches connected to each other in series and to data inputs in parallel. The latches read in values from the data inputs in parallel, and then output the values serially. A readout control circuitry of the latch-based parallel to serial readout circuitry may cause the latches to read in the values in parallel by switching an active input connection of the latches to the data inputs and enabling the latches simultaneously. The readout control circuitry may cause the latches to readout the values serially by switching an active input connection of the latches to the output of a next latch and sequentially enabling the latches.
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