Invention Grant
- Patent Title: Cache management directory where hardware manages cache write requests and software manages cache read requests
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Application No.: US15015316Application Date: 2016-02-04
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Publication No.: US09916247B2Publication Date: 2018-03-13
- Inventor: Burkhard Steinmacher-Burow
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Teddi E. Maranzano
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0817 ; G06F12/084

Abstract:
A method is provided for cache coherence being based on a hybrid approach relying on hardware-and software-implemented functionalities. In case a processor core is requested to perform a write operation on a memory line missed in the local cache of said core, a hardware-implemented coherence directory ensures that said processor core becomes assigned exclusive write permissions to indicate that the memory line in said local cache is up-to-date after said write. In case the processor core is requested to perform a read operation on a memory line missed in the local cache of said processor core, the coherence directory updates the coherence directory to indicate that none of the processor cores of the system has exclusive write permission on the memory line and relies on software executed on said processor core to ensure that the cached memory line is up-to-date before performing the read operation.
Public/Granted literature
- US20170228316A1 REQUEST-TYPE SENSITIVE CACHE COHERENCE Public/Granted day:2017-08-10
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