Invention Grant
- Patent Title: Method and system for efficiently determining differential voltages for electrostatic discharge simulations
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Application No.: US15199939Application Date: 2016-06-30
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Publication No.: US09916403B1Publication Date: 2018-03-13
- Inventor: Nityanand Rai , Hui Zheng , Xin Gu
- Applicant: Cadence Design Systems, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
An improved approach is provided for determining differential voltages for driver and receiver pairs as a result of electrostatic discharge (ESD) events including identifying circuits of interest, re-characterizing the circuits of interest into a system for evaluating differential voltages, determining the differential voltages for ESD pin locations, and outputting results after iterating through all the ESD pin locations. In some embodiments, re-characterizing may include performing a resistance only extraction of a net, attaching a resistance to any node in the circuit and to ground, formulating a conductance matrix and distributing the total current I as source points. In some embodiments, determining differential voltages for ESD pin locations may include, stamping a first ESD pin location with a total current, solving for the system using previously computed values, mapping the driver and receiver pairs to the nodes in the system, computing the differential voltage, and recording the lowest differential voltage.
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