Invention Grant
- Patent Title: Stress relieved thermal base for integrated circuit packaging
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Application No.: US15375314Application Date: 2016-12-12
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Publication No.: US09917040B1Publication Date: 2018-03-13
- Inventor: Craig J. Rotay
- Applicant: STMicroelectronics, Inc.
- Applicant Address: US TX Coppell
- Assignee: STMicroelectronics, Inc.
- Current Assignee: STMicroelectronics, Inc.
- Current Assignee Address: US TX Coppell
- Agency: Gardere Wynne Sewell LLP
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/00 ; H01L23/31

Abstract:
A package is formed by a thermal base and a leadframe assembly. The thermal base includes a body of thermally conductive material having a top surface, wherein the top surface of the body includes a pedestal. An integrated circuit chip is mounted to the pedestal, the integrated circuit chip including bonding pads. The leadframe assembly includes leads and an encapsulant ring that partially embeds the leads. The leadframe assembly is mounted to the top surface of said body surrounding the pedestal. The pedestal is configured with a thickness that positions the bonding pad at a height substantially coplanar with the leads. Bonding wires extend from the bonding pads to the leads with a shortened length so as to provide for improved electrical characteristics of frequency response, impedance and inductance.
Information query
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