Invention Grant
- Patent Title: Semiconductor device having vertical channel between stacked electrode layers and insulating layers
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Application No.: US15264781Application Date: 2016-09-14
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Publication No.: US09917099B2Publication Date: 2018-03-13
- Inventor: Tatsufumi Hamada , Hikari Tajima , Takashi Izumida , Nobutoshi Aoki , Shinya Naito , Takayuki Kakegawa , Takaya Yamanaka
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L27/11582 ; H01L23/528 ; H01L27/11551 ; H01L29/792 ; H01L29/66

Abstract:
According to one embodiment, a semiconductor device includes a substrate; a stacked body provided on the substrate, the stacked body including a plurality of electrode layers stacked with an insulator interposed; a semiconductor body provided in the stacked body; and an insulating film. The semiconductor body includes a channel portion extending in a stacking direction of the stacked body, and a lower end portion of the semiconductor body provided between the channel portion and the substrate. The insulating film includes a charge storage film provided between the stacked body and the semiconductor body. A lower end portion of the insulating film surrounds the lower end portion of the semiconductor body. An upper surface of the lower end portion of the insulating film is provided at a lower height than an upper surface of the lower end portion of the semiconductor body in the stacking direction.
Public/Granted literature
- US20170263635A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2017-09-14
Information query
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