Invention Grant
- Patent Title: Noise reduction board and electronic device
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Application No.: US15208944Application Date: 2016-07-13
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Publication No.: US09918380B2Publication Date: 2018-03-13
- Inventor: Hajime Murakami
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Fujitsu Patent Center
- Priority: JP2015-159759 20150813
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K1/14 ; H01L23/31 ; H05K1/11 ; G06F1/18

Abstract:
A noise reduction board includes: a first board; a second board arranged under the first board; a plurality of power feeding parts made of a metal in a shape of a pole and configured to electrically interconnect the first board and the second board; and a noise reduction part arranged between the power feeding parts, wherein the noise reduction part includes: a metal plate; an insulator configured to cover a surface of the metal plate; a first terminal provided on the side of the first board of the metal plate and electrically coupled to a ground pattern of the first board; and a second terminal provided on the side of the second board of the metal plate and electrically coupled to a ground pattern of the second board.
Public/Granted literature
- US20170048963A1 NOISE REDUCTION BOARD AND ELECTRONIC DEVICE Public/Granted day:2017-02-16
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