Invention Grant
- Patent Title: Latch with built-in level shifter
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Application No.: US15405423Application Date: 2017-01-13
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Publication No.: US09934845B2Publication Date: 2018-04-03
- Inventor: Hao-I Yang , Cheng Hung Lee , Chi-Kai Hsieh , Fu-An Wu , Tsung-Hsien Huang
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Campany Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Campany Limited
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C11/419 ; H03K3/356 ; H03K19/0175

Abstract:
A semiconductor device comprising a first supply voltage, a second supply voltage, different from the first supply voltage; and a switching circuit. The switching circuit comprises an input configured to receive an input signal corresponding to the first supply voltage and an output configured to output an output signal corresponding to the second supply voltage. The switching circuit is a combined latch with a built-in level shifter that provides latching functionality and level shifting functionality and a leakage path is cut-off when the switching circuit is providing latching functionality.
Public/Granted literature
- US20170345487A1 Latch With Built-In Level Shifter Public/Granted day:2017-11-30
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