Invention Grant
- Patent Title: Apparatuses and methods for memory testing and repair
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Application No.: US14790485Application Date: 2015-07-02
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Publication No.: US09934870B2Publication Date: 2018-04-03
- Inventor: Joe M. Jeddeloh , Brent Keeth
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G11C29/44 ; G06F11/20 ; G06F11/16 ; G06F11/07 ; G06F11/10 ; G11C29/00 ; G11C29/04

Abstract:
Some embodiments include apparatuses and methods having a first interface to communicate with a processing unit, a second interface to communicate with a memory device, and a module coupled to the first and second interfaces. In at least one of the embodiments, the module can be configured to obtain information stored in the memory device and perform at least one of testing and repairing of a memory structure of the memory device based at least in part on the information.
Public/Granted literature
- US20150380109A1 APPARATUSES AND METHODS FOR MEMORY TESTING AND REPAIR Public/Granted day:2015-12-31
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