Invention Grant
- Patent Title: Methods of manufacturing semiconductor devices by forming source/drain regions before gate electrode separation
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Application No.: US15489782Application Date: 2017-04-18
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Publication No.: US09935017B2Publication Date: 2018-04-03
- Inventor: Jung-Gun You , Eung-Gwan Kim , Jeong-Yun Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Ward and Smith, P.A.
- Priority: KR10-2014-0149483 20141030
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/8238 ; H01L29/66 ; H01L27/092 ; H01L29/06 ; H01L29/161 ; H01L29/16 ; H01L29/165 ; H01L29/08 ; H01L29/78

Abstract:
Spaced apart first and second fins are formed on a substrate. An isolation layer is formed on the substrate between the first and second fins. A gate electrode is formed on the isolation layer and crossing the first and second fins. Source/drain regions are formed on the first and second fins adjacent the gate electrode. After forming the source/drain regions, a portion of the gate electrode between the first and second fins is removed to expose the isolation layer. The source/drain regions may be formed by epitaxial growth.
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