Invention Grant
- Patent Title: FinFET with source/drain structure
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Application No.: US14997372Application Date: 2016-01-15
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Publication No.: US09935199B2Publication Date: 2018-04-03
- Inventor: Kuo-Cheng Ching , Ching-Wei Tsai , Chih-Hao Wang , Ying-Keung Leung
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L29/78 ; H01L21/8234 ; H01L29/08 ; H01L29/417 ; H01L29/06 ; H01L27/088 ; H01L29/66 ; H01L29/49 ; H01L21/764 ; H01L27/12 ; H01L27/11

Abstract:
A semiconductor device includes a substrate including a first fin element, a second fin element, and a third fin element. A first source/drain epitaxial feature is disposed over the first and second fin elements. A first portion of the first source/drain epitaxial feature disposed on the first fin element and a second portion of the first source/drain epitaxial feature disposed on the second fin element merge at a merge point. A second source/drain epitaxial feature is disposed over the third fin element. A first sidewall of the second source/drain epitaxial feature interfaces a first third-fin spacer disposed along a first sidewall of the third fin element. A second sidewall of the second source/drain epitaxial feature interfaces a second third-fin spacer disposed along a second sidewall of the third fin element. The merge point has a first height less than a second height of the first third-fin spacer.
Public/Granted literature
- US20170207126A1 FINFET WITH SOURCE/DRAIN STRUCTURE AND METHOD OF FABRICATION THEREOF Public/Granted day:2017-07-20
Information query
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