Invention Grant
- Patent Title: Annealed metal source drain overlapping the gate of a fin field effect transistor
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Application No.: US15473706Application Date: 2017-03-30
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Publication No.: US09935200B2Publication Date: 2018-04-03
- Inventor: Effendi Leobandung
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Michael O'Keeffe
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/423 ; H01L29/45 ; H01L27/12 ; H01L29/08 ; H01L29/417

Abstract:
A method of forming a field effect transistor is provided. The method of forming a field effect transistor may include forming a dummy gate perpendicular to and covering a channel region of a semiconductor fin, such that a source drain region of the semiconductor fin remains uncovered, depositing a metal layer above and in direct contact with a sidewall of the dummy gate, and above and in direct contact with a top and a sidewall of the source drain region, and forming a metal silicide source drain in the source drain region by annealing the metal layer and the semiconductor fin, such that the metal silicide source drain overlaps the dummy gate.
Public/Granted literature
- US20170207332A1 ANNEALED METAL SOURCE DRAIN OVERLAPPING THE GATE Public/Granted day:2017-07-20
Information query
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