Invention Grant
- Patent Title: Semiconductor device
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Application No.: US15062491Application Date: 2016-03-07
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Publication No.: US09935621B2Publication Date: 2018-04-03
- Inventor: Masashi Nakata , Hidefumi Kushibe
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H03K3/017
- IPC: H03K3/017 ; H03K5/04 ; H03K7/08 ; H03K5/156

Abstract:
According to one embodiment, there is provided a semiconductor device including an input terminal, an output terminal, an oscillation circuit, an adjuster circuit, a driver circuit, and a detector circuit. The input terminal receives a first clock. The oscillation circuit generates an internal clock. The adjuster circuit corrects a duty ratio of a clock. The driver circuit receives the clock from the adjuster circuit and supplies a third clock to the output terminal. The detector circuit detects that a duty ratio of a clock according to the third clock deviates from a duty ratio of a second clock according to the internal clock. The adjuster circuit adjusts a correction amount in tune with the second clock, and corrects a duty ratio of the first clock with the adjusted correction amount according to a detection result of the detector circuit.
Public/Granted literature
- US20170077915A1 SEMICONDUCTOR DEVICE Public/Granted day:2017-03-16
Information query
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