Invention Grant
- Patent Title: Post-program conditioning of stacked memory cells prior to an initial read operation
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Application No.: US15427825Application Date: 2017-02-08
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Publication No.: US09940232B1Publication Date: 2018-04-10
- Inventor: Young Pil Kim , Antoine Khoueir
- Applicant: Seagate Technology LLC
- Applicant Address: US CA Cupertino
- Assignee: Seagate Technology LLC
- Current Assignee: Seagate Technology LLC
- Current Assignee Address: US CA Cupertino
- Agency: Hall Estill Attorneys at Law
- Main IPC: G11C16/12
- IPC: G11C16/12 ; G06F12/02 ; G11C16/10 ; G11C16/28 ; G11C16/34 ; G11C16/14

Abstract:
Method and apparatus for managing data in a stacked semiconductor memory, such as but not limited to a three dimensional (3D) NAND flash memory array. In some embodiments, a data set is written to the memory array by programming a stack of memory cells to a desired set of program states. A first set of pulses is applied to verify the memory cells conform to the desired set of program states. The verified stack of memory cells are subsequently conditioned by applying a second set of pulses to remove accumulated charge from a shared channel region of the stack. The conditioning of the memory cells reduces a step-wise increase in the number of read errors during the first read operation as compared to subsequent read operations on the memory cells.
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