A gate driving circuit and a display device using the same are discussed. The gate driving circuit according to an embodiment includes a first shift register configured to sequentially shift a gate start pulse in response to a gate shift clock and output a gate pulse shifted on a per block basis, each block including a plurality of gate lines, a second shift register configured to sequentially shift the gate start pulse in response to the gate shift clock and output a gate pulse shifted on a per gate line basis, and a controller configured to supply the gate shift clock to one of the first and second shift registers.