Invention Grant
- Patent Title: Integrated circuit and process for fabricating thereof
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Application No.: US13211062Application Date: 2011-08-16
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Publication No.: US09941158B2Publication Date: 2018-04-10
- Inventor: Charan Gurumurthy , Islam Salama , Houssam Jomaa , Ravi Tanikella
- Applicant: Charan Gurumurthy , Islam Salama , Houssam Jomaa , Ravi Tanikella
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Grossman, Tucker, Perreault & Pfiger, PLLC
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/532 ; H01L21/288

Abstract:
A process for fabricating an Integrated Circuit (IC) and the IC formed thereby is disclosed. The process comprises providing a substrate. The process further comprises forming a plurality of longitudinal trenches in the substrate and depositing a layer of a first conductive material on at least one longitudinal trench of the plurality of longitudinal trenches. A first layer of a second conductive material is deposited on the layer of the first conductive material. Thereafter, the process includes depositing a second layer of the second conductive material on the first layer of the second conductive material. The second layer of the second conductive material at least partially fills the at least one longitudinal trench. The first conductive material is selected such that a reduction potential of the first conductive material is less than a reduction potential of the second conductive material.
Public/Granted literature
- US20110298135A1 INTEGRATED CIRCUIT AND PROCESS FOR FABRICATING THEREOF Public/Granted day:2011-12-08
Information query
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