Invention Grant
- Patent Title: Semiconductor manufacturing method
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Application No.: US15231717Application Date: 2016-08-08
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Publication No.: US09941165B2Publication Date: 2018-04-10
- Inventor: Tatsuo Migita , Fumito Shoji , Koji Ogiso
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Tokyo
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Tokyo
- Agency: Patterson & Sheridan, LLP
- Priority: JP2016-050105 20160314
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/768 ; H01L21/288 ; H01L21/02 ; H01L21/67 ; H01L21/687 ; B08B3/02

Abstract:
A semiconductor manufacturing method includes forming a first metal film on a semiconductor wafer by plating, ejecting liquid from a washer bar spaced from the wafer while rotating at least one of the washer and the semiconductor, and forming a second metal film on the first metal film. A plurality of nozzles are located on the washer bar and displaced from the position of the washer bar opposed to the center of the wafer, and a greater number of nozzles are adjacent the peripheral area of the semiconductor wafer than the central area of the semiconductor wafer. The nozzles in the peripheral area of the wafer eject the washing liquid in a direction inclined from the direction of the washer bar, and a nozzle arranged on the central area of the one main surface of the semiconductor wafer ejects the washing liquid towards the center position of the semiconductor wafer.
Public/Granted literature
- US20170263499A1 SEMICONDUCTOR MANUFACTURING METHOD Public/Granted day:2017-09-14
Information query
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