Invention Grant
- Patent Title: Semiconductor device and design method of same
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Application No.: US15640814Application Date: 2017-07-03
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Publication No.: US09941270B2Publication Date: 2018-04-10
- Inventor: Kazuyuki Nakanishi , Daisuke Matsuoka
- Applicant: Panasonic Intellectual Property Management Co., Ltd.
- Applicant Address: JP Osaka
- Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2015-002650 20150108
- Main IPC: H01L23/60
- IPC: H01L23/60 ; H01L27/02 ; G06F17/50 ; H01L23/528 ; H02H9/04 ; H01L49/02 ; H01L29/10 ; H01L29/06 ; H01L23/522 ; H01L21/8234

Abstract:
A semiconductor device includes a semiconductor substrate having a predetermined region in which a standard cell is disposed, and also includes: a first circuit connected to a first ground power line; a second circuit that is connected to a second ground power line and formed from the standard cells; and a protection circuit interposed and connected between the first circuit and the second circuit. The protection circuit includes: a resistor connected in series between the first circuit and the second circuit; and a protector that is interposed and connected between a node of the resistor on the second circuit side and the second ground power line and clamps a potential difference between the node and the second ground power line to a predetermined voltage or lower. The protection circuit is formed in a protection cell disposed in the predetermined region.
Public/Granted literature
- US20170301665A1 SEMICONDUCTOR DEVICE AND DESIGN METHOD OF SAME Public/Granted day:2017-10-19
Information query
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