Invention Grant
- Patent Title: Power MOSFET
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Application No.: US15182586Application Date: 2016-06-14
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Publication No.: US09941357B2Publication Date: 2018-04-10
- Inventor: Chu-Kuang Liu
- Applicant: Excelliance MOS Corporation
- Applicant Address: TW Hsinchu County
- Assignee: Excelliance MOS Corporation
- Current Assignee: Excelliance MOS Corporation
- Current Assignee Address: TW Hsinchu County
- Agency: JCIPRNET
- Priority: TW105115306A 20160518
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L29/10 ; H01L29/78

Abstract:
A power MOSFET includes a substrate, a semiconductor layer, a first gate, a second gate, a thermal oxide layer, a first CVD oxide layer, and a gate oxide layer. The semiconductor layer is formed on the substrate and has at least one trench. The first gate is located inside the trench. The second gate is located inside the trench on the first gate, wherein the second gate has a first portion and a second portion, and the second portion is located between the semiconductor layer and the first portion. The thermal oxide layer is located between the first gate and the semiconductor layer. The first CVD oxide layer is located between the first gate and the second gate. The gate oxide layer is generally located between the second gate and the semiconductor layer.
Public/Granted literature
- US20170338309A1 POWER MOSFET Public/Granted day:2017-11-23
Information query
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