Invention Grant
- Patent Title: Vertical field-effect-transistors having multiple threshold voltages
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Application No.: US15422567Application Date: 2017-02-02
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Publication No.: US09941370B2Publication Date: 2018-04-10
- Inventor: Karthik Balakrishnan , Kangguo Cheng , Pouya Hashemi , Alexander Reznicek
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Fleit Gibbons Gutman Bongini Bianco PL
- Agent Thomas S. Grzesik
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L29/423 ; H01L29/78 ; H01L29/66 ; H01L27/088 ; H01L29/10 ; H01L29/417 ; H01L29/04 ; H01L29/08

Abstract:
Various embodiments disclose a method for fabricating a semiconductor structure including a plurality of vertical transistors each having different threshold voltages. In one embodiment the method includes forming a structure having at least a substrate, a source contact layer on the substrate, a first spacer layer on the source contact layer, a replacement gate on the first spacer layer, a second spacer layer on the replacement gate, and an insulating layer on the second spacer layer. A first trench is formed in a first region of the structure. A first channel layer having a first doping concentration is epitaxially grown in the first trench. A second trench is formed in a second region of the structure. A second channel layer having a second doping concentration is epitaxially grown in the second trench. The second doping concentration is different from the first doping concentration.
Public/Granted literature
- US20170170298A1 VERTICAL FIELD-EFFECT-TRANSISTORS HAVING MULTIPLE THRESHOLD VOLTAGES Public/Granted day:2017-06-15
Information query
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