A synchronous regulator controller, including a synchronous switch that is coupled between a first node and a second node. The controller also includes a first voltage divider that includes a first resistive device that is coupled between the first node and a third node, and a second resistive device that is coupled between the third node and a second node. The controller also includes a comparator having a first input that is coupled to the first node, and a second input that is coupled to a forth node. The controller also includes a current source that is arranged to provide a current to the fourth node. The controller also includes a third resistive device that is coupled between the third node and the fourth node.