Invention Grant
- Patent Title: Implementing pseudo non-masking interrupts behavior using a priority interrupt controller
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Application No.: US14876831Application Date: 2015-10-07
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Publication No.: US09952895B2Publication Date: 2018-04-24
- Inventor: Andrei Warkentin , Irfan Ulla Khan , Cyprien Laplace , Harvey Tuch , Alexander Fainkichen
- Applicant: VMWARE, INC.
- Applicant Address: US CA Palo Alto
- Assignee: VMware, Inc.
- Current Assignee: VMware, Inc.
- Current Assignee Address: US CA Palo Alto
- Agency: Patterson & Sheridan, LLP
- Priority: IN3251/CHE/2015 20150627
- Main IPC: G06F13/24
- IPC: G06F13/24 ; G06F13/00 ; G06F9/48 ; G06F13/26

Abstract:
A method is provided for handling interrupts in a processor, the interrupts including regular interrupts having a range of priorities and a pseudo non-maskable interrupt (PNMI) that is of a higher priority than any of the regular interrupts. The method includes the steps of obtaining an interrupt vector corresponding to a received interrupt, and if the received interrupt is a regular interrupt, enabling interrupts in the processor so that a PNMI can be received while handling the regular interrupt, executing a regular interrupt handler using the interrupt vector, and disabling interrupts in the processor. On the other hand, if the received interrupt is a PNMI, a PNMI interrupt handler is executed using the interrupt vector as an input thereto.
Public/Granted literature
- US20160378543A1 IMPLEMENTING PSEUDO NON-MASKING INTERRUPTS BEHAVIOR USING A PRIORITY INTERRUPT CONTROLLER Public/Granted day:2016-12-29
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