Invention Grant
- Patent Title: Semiconductor device
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Application No.: US15667505Application Date: 2017-08-02
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Publication No.: US09953987B2Publication Date: 2018-04-24
- Inventor: Yoshiki Yamamoto
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2015-222995 20151113
- Main IPC: G11C11/00
- IPC: G11C11/00 ; H01L27/11 ; H01L27/12 ; G11C11/412 ; G11C11/419 ; H01L23/528 ; H01L29/06

Abstract:
A semiconductor device, including: a semiconductor substrate having a first well region; an insulating layer formed on a first portion of the semiconductor substrate, and contacted with the first well region; a semiconductor layer formed on the insulating layer; an element isolation region reaching to an inside of the first well region, in a cross-sectional view; a first gate electrode layer formed on a first portion of the semiconductor layer via a first gate insulating film; a second gate electrode layer formed on both a second portion of the semiconductor layer via a second gate insulating film and a first portion of the element isolation region; an interlayer insulating film covering the first gate electrode layer, the second gate electrode layer and a second portion of the element isolation region; a first plug conductor layer formed in the interlayer insulating film.
Public/Granted literature
- US20170330885A1 SEMICONDUCTOR DEVICE Public/Granted day:2017-11-16
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