Invention Grant
- Patent Title: Monolithic integration techniques for fabricating photodetectors with transistors on same substrate
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Application No.: US15353532Application Date: 2016-11-16
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Publication No.: US09954121B2Publication Date: 2018-04-24
- Inventor: Szu-Lin Cheng , Shu-Lu Chen
- Applicant: Artilux, Inc.
- Applicant Address: TW Zhubei
- Assignee: Artilux Inc.
- Current Assignee: Artilux Inc.
- Current Assignee Address: TW Zhubei
- Agency: Perkins Coie LLP
- Main IPC: H01L31/105
- IPC: H01L31/105 ; H01L31/02 ; H01L27/144 ; H01L31/18 ; H01L21/8234 ; H01L31/0216 ; H01L29/78 ; H01L31/028 ; H01L21/70 ; H01L21/77 ; H01L31/0232 ; H01L23/522 ; H01L23/532 ; H01L29/06 ; H01L31/0224 ; H01L31/0352

Abstract:
Examples of the various techniques introduced here include, but not limited to, a mesa height adjustment approach during shallow trench isolation formation, a transistor via first approach, and a multiple absorption layer approach. As described further below, the techniques introduced herein include a variety of aspects that can individually and/or collectively resolve or mitigate one or more traditional limitations involved with manufacturing PDs and transistors on the same substrate, such as above discussed reliability, performance, and process temperature issues.
Public/Granted literature
- US20170069668A1 MONOLITHIC INTEGRATION TECHNIQUES FOR FABRICATING PHOTODETECTORS WITH TRANSISTORS ON SAME SUBSTRATE Public/Granted day:2017-03-09
Information query
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