Invention Grant
- Patent Title: Method for evaluating defect region of semiconductor substrate
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Application No.: US15309584Application Date: 2015-03-16
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Publication No.: US09958493B2Publication Date: 2018-05-01
- Inventor: Takashi Aratani
- Applicant: SHIN-ETSU HANDOTAI CO., LTD.
- Applicant Address: JP Tokyo
- Assignee: SHIN-ETSU HANDOTAI CO., LTD.
- Current Assignee: SHIN-ETSU HANDOTAI CO., LTD.
- Current Assignee Address: JP Tokyo
- Agency: Oliff PLC
- Priority: JP2014-129850 20140625
- International Application: PCT/JP2015/001431 WO 20150316
- International Announcement: WO2015/198510 WO 20151230
- Main IPC: G01R31/02
- IPC: G01R31/02 ; G01R31/26 ; C30B29/06 ; C30B33/00 ; C30B15/20 ; C30B15/30

Abstract:
A method evaluates a defect region of a semiconductor substrate based on C-V characteristics of a MOS structure formed on the semiconductor substrate, including determining a relationship between defect region and flat band voltage or fixed charge density by using a semiconductor substrate having a known defect region, under a heat treatment condition and a C-V characteristic evaluating condition identical to conditions for evaluating a defect region of a semiconductor substrate to be evaluated, determining a flat band voltage or a fixed charge density of the semiconductor substrate to be evaluated from C-V characteristics of a MOS structure formed on the semiconductor substrate to be evaluated, and identifying the defect region of the semiconductor substrate to be evaluated based on the relationship between defect region and flat band voltage or fixed charge density previously determined, whereby the defect region of the semiconductor substrate is evaluated.
Public/Granted literature
- US20170160335A1 METHOD FOR EVALUATING DEFECT REGION OF SEMICONDUCTOR SUBSTRATE Public/Granted day:2017-06-08
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