Invention Grant
- Patent Title: Memory and processor hierarchy to improve power efficiency
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Application No.: US14855803Application Date: 2015-09-16
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Publication No.: US09959202B2Publication Date: 2018-05-01
- Inventor: Jan Van Lunteren , Heiner Giefers
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Scott S. Dobson
- Priority: GB1416304.2 20140916
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F1/32 ; G06F9/30 ; G06F9/26

Abstract:
A computing memory includes an execution unit and an access processor coupled with a memory system, where the execution unit and the access processor are logically separated units. The execution unit is for processing operand data. The access processor is for providing operand data and configuration data to the execution unit. The access processor reads operand data from the memory system and sends the operand data to the execution unit. The execution unit executes the operand data according to the provided configuration data. The access processor includes information about execution times of operations of the execution unit for the provided configuration. The access processor reserves time-slots for writing execution unit results provided by the execution unit into selected locations in the memory system based on the information about the execution times, upon sending at least one of the operand data and the configuration data to the execution unit.
Public/Granted literature
- US20160077577A1 MEMORY AND PROCESSOR HIERARCHY TO IMPROVE POWER EFFICIENCY Public/Granted day:2016-03-17
Information query