Invention Grant
- Patent Title: Vector processor configured to operate on variable length vectors using implicitly typed instructions
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Application No.: US14728522Application Date: 2015-06-02
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Publication No.: US09959246B2Publication Date: 2018-05-01
- Inventor: Mayan Moudgill , C. John Glossner , Arthur Joseph Hoane , Paul Hurtley , Vitaly Kalashnikov
- Applicant: Optimum Semiconductor Technologies, Inc.
- Applicant Address: US NY Tarrytown
- Assignee: Optimum Semiconductor Technologies, Inc.
- Current Assignee: Optimum Semiconductor Technologies, Inc.
- Current Assignee Address: US NY Tarrytown
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/38 ; G06F15/78 ; G06F15/80 ; G06F17/14
Abstract:
A computer processor is disclosed. The computer processor may comprise a vector unit comprising a vector register file comprising one or more registers to hold a varying number of elements. The computer processor may further comprise processing logic configured to implicitly type each of the varying number of elements in the vector register file. The computer processor may be implemented as a monolithic integrated circuit.
Public/Granted literature
- US20160224511A1 VECTOR PROCESSOR CONFIGURED TO OPERATE ON VARIABLE LENGTH VECTORS USING IMPLICITLY TYPED INSTRUCTIONS Public/Granted day:2016-08-04
Information query
