Invention Grant
- Patent Title: Methods of manufacturing semiconductor device having a blocking insulation layer
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Application No.: US15609099Application Date: 2017-05-31
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Publication No.: US09960046B2Publication Date: 2018-05-01
- Inventor: Jung Ho Kim , Bio Kim , Jaeyoung Ahn , Dongchul Yoo
- Applicant: Jung Ho Kim , Bio Kim , Jaeyoung Ahn , Dongchul Yoo
- Applicant Address: KR Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2016-0122406 20160923
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L27/1157 ; H01L27/11582 ; H01L21/02

Abstract:
A method of manufacturing a semiconductor device includes forming insulation layers and sacrificial layers that are alternately and repeatedly stacked on top of each other a substrate, forming a vertical hole that penetrates the insulation layers and the sacrificial layers, and forming a vertical channel structure in the vertical hole. The forming the vertical channel structure includes forming a blocking insulation layer, a charge storage layer, a tunnel insulation layer, and a semiconductor pattern. The forming the blocking insulation layer includes forming a first oxidation target layer, oxidizing the first oxidation target layer to form a first sub-blocking layer, and forming a second sub-blocking layer. The first sub-blocking layer is formed between the second sub-blocking layer and an inner sidewall of the vertical hole.
Public/Granted literature
- US20180090329A1 METHODS OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING A BLOCKING INSULATION LAYER Public/Granted day:2018-03-29
Information query
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