An array substrate includes a gate line, a common electrode line, a common electrode and a pixel electrode arranged on a base substrate. The common electrode is electrically connected to the common electrode line through a common electrode via-hole, and the common electrode includes a hollowed-out portion and a reserved portion at a region corresponding to the common electrode via-hole. The reserved portion is arranged between the gate line adjacent to the common electrode line and the pixel electrode adjacent to the common electrode line, and electrically connected to the common electrode line through the common electrode via-hole. The reserved portion does not overlap the gate line or the pixel electrode. The hollowed-out portion is at least arranged at a side of the reserved portion adjacent to the gate line and/or pixel electrode and between the reserved portion and the gate line and/or the pixel electrode.