Invention Grant
- Patent Title: Integrated circuit structure with substrate isolation and un-doped channel
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Application No.: US14942740Application Date: 2015-11-16
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Publication No.: US09960273B2Publication Date: 2018-05-01
- Inventor: Kuo-Cheng Ching , Ching-Wei Tsai , Chung-Cheng Wu , Chih-Hao Wang , Wen-Hsing Hsieh , Ying-Keung Leung
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L27/06 ; H01L29/66 ; H01L29/417

Abstract:
The present disclosure provides a semiconductor structure. The semiconductor structure includes a substrate having a first region and a second region; a first fin feature formed on the substrate within the first region; and a second fin feature formed on the substrate within the second region. The first fin feature includes a first semiconductor feature of a first semiconductor material formed on a dielectric feature that is an oxide of a second semiconductor material. The second fin feature includes a second semiconductor feature of the first semiconductor material formed on a third semiconductor feature of the second semiconductor material.
Public/Granted literature
- US20170141220A1 Integrated Circuit Structure with Substrate Isolation and Un-Doped Channel Public/Granted day:2017-05-18
Information query
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