Invention Grant
- Patent Title: Spread spectrum clocking phase error cancellation for analog CDR/PLL
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Application No.: US15256444Application Date: 2016-09-02
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Publication No.: US09960774B2Publication Date: 2018-05-01
- Inventor: Amir Amirkhany , Ashkan Roshan Zamir
- Applicant: Samsung Display Co., Ltd.
- Applicant Address: KR Yongin-si
- Assignee: Samsung Display Co., Ltd.
- Current Assignee: Samsung Display Co., Ltd.
- Current Assignee Address: KR Yongin-si
- Agency: Lewis Roca Rothgerber Christie LLP
- Main IPC: H04B3/46
- IPC: H04B3/46 ; H03L7/08 ; H03L7/099 ; H03L7/089 ; H03L7/093 ; H04L12/801

Abstract:
A system and method for correcting for phase errors, in a phase locked loop, resulting from spread spectrum clocking involving a reference clock signal having a frequency modulation. A correction generation circuit generates an offset signal, that when injected after the charge pump of the phase locked loop, causes the voltage controlled oscillator to produce a signal with substantially the same frequency modulation, thereby reducing the phase error. The correction generation circuit may include a timing estimation circuit for estimating the times at which transitions (between positive-sloping and negative-sloping portions of the triangle wave) occur, and an amplitude estimation circuit for estimating the amplitude of the offset signal that results in a reduction in the phase error.
Public/Granted literature
- US20180013434A1 SPREAD SPECTRUM CLOCKING PHASE ERROR CANCELLATION FOR ANALOG CDR/PLL Public/Granted day:2018-01-11
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