Invention Grant
- Patent Title: Memory controller with processor for generating interface adjustment signals
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Application No.: US14835568Application Date: 2015-08-25
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Publication No.: US09965008B2Publication Date: 2018-05-08
- Inventor: Stephen G. Tell
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: RAMBUS INC.
- Current Assignee: RAMBUS INC.
- Current Assignee Address: US CA Sunnyvale
- Agency: Morgan, Lewis & Bockius LLP
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F1/26 ; G06F1/10 ; G06F13/40 ; H04L7/02 ; G06F13/38 ; G11C7/10 ; H03K19/177
Abstract:
Described are a system and method to control interface timing and/or voltage operations of signals transmitted between devices. A processor may be coupled through one or more bus interfaces of a bus to one or more corresponding interface timing and/or voltage comparison circuits and corresponding interface timing and/or voltage adjustment circuits.
Public/Granted literature
- US20150362967A1 Memory Controller with Processor for Generating Interface Adjustment Signals Public/Granted day:2015-12-17
Information query
