Invention Grant
- Patent Title: Semiconductor device manufacturing method
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Application No.: US15067396Application Date: 2016-03-11
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Publication No.: US09966311B2Publication Date: 2018-05-08
- Inventor: Shingo Masuko
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: White & Case LLP
- Priority: JP2015-175951 20150907
- Main IPC: H01L21/71
- IPC: H01L21/71 ; B23K26/00 ; H01L21/78 ; H01L21/683 ; H01L29/20 ; H01L29/66
Abstract:
A semiconductor device manufacturing method according to an embodiment including partially forming a first groove on a nitride semiconductor layer provided on a first plane of a substrate having first and second planes by etching so that the substrate is exposed, forming a second groove on the substrate exposed inside the first groove so that a portion of the substrate remains, removing the substrate from the second plane side so that the second groove is not exposed, thinning the substrate, forming a metal film on the second plane side of the substrate, removing the metal film in a portion where the second groove is formed, and forming a third groove on the substrate in the portion where the second groove is formed so that the second groove is exposed from the second plane side.
Public/Granted literature
- US20170069535A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2017-03-09
Information query
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