- Patent Title: Semiconductor devices including an etch stop pattern and a sacrificial pattern with coplanar upper surfaces and a gate and a gap fill pattern with coplanar upper surfaces
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Application No.: US15010470Application Date: 2016-01-29
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Publication No.: US09966432B2Publication Date: 2018-05-08
- Inventor: Sangjine Park , Boun Yoon , Jeongnam Han
- Applicant: Sangjine Park , Boun Yoon , Jeongnam Han
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2010-0097922 20101007
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/08 ; H01L21/8234 ; H01L29/78 ; H01L23/535 ; H01L29/16 ; H01L29/165 ; H01L29/45 ; H01L29/417

Abstract:
Semiconductor devices and methods of manufacturing semiconductor devices. A semiconductor device includes a metal gate electrode stacked on a semiconductor substrate with a gate insulation layer disposed therebetween, spacer structures disposed on the semiconductor substrate at both sides of the metal gate electrode, source/drain regions formed in the semiconductor substrate at the both sides of the metal gate electrode, and an etch stop pattern including a bottom portion covering the source/drain regions and a sidewall portion extended from the bottom portion to cover a portion of sidewalls of the spacer structures, in which an upper surface of the sidewall portion of the etch stop pattern is positioned under an upper surface of the metal gate electrode.
Public/Granted literature
- US20160163861A1 SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME Public/Granted day:2016-06-09
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